Many computing systems, such as personal computers, automotive an airplane control systems, cellular phones, digital cameras, and hand-held communication devices, use nonvolatile writeable memories to store either data or code, or both. Such nonvolatile writeable memories include flash EEPROMs (Electrically Programmable and Erasable Read-Only-Memories; hereinafter referred to as "flash memories"). Non-volatility is advantageous in that it allows the computing system to retain its data and code even when power to the computing system is interrupted. Thus, even if the system is turned off or even if there is a power failure, no code or data loss occurs.
Flash memories have shown more advanced performance in accessing data, than any other kind of nonvolatile memories, such as EEPROMs, for a reading and writing (or programming). The merit of high speed operation in the flash memory has been regarded to be very useful in the fields of the products aforementioned. In general, there are two kinds of flash memory: NAND-type, in which memory cells are connected from a bit line in serial, and NOR-type in which memory cells are connected to a bit line in parallel. It is well known that the NOR-type flash memory has faster data access, which makes the NOR-type be more advantageous in a high frequency memory system than the NAND-type. In the NOR-type flash memories, a data state of a memory cell is detected by a sense amplifier, comparing with a predetermined reference value. Stabilizing the detecting operation may become more critical than any other factors in the NOR-type flash memories.
The flash memory of FIG. 1, shows one memory block 100, out of a plurality of memory blocks in a memory cell array of a flash memory device, and the peripheral circuit blocks. Those include a first control circuit 110, a reference cell block 200, a second control circuit 210, a sense amplifier 300, and a high voltage generation circuit 400. First control circuit 110 is composed of circuits for driving and controlling the operations of programming, erasing, reading, and verifying for the memory block. Reference cell block 200 makes cell current, i.e. reference current, with respect to the detecting current through a selected memory cell of the memory block and then applies the reference current to sense amplifier 300. Second control circuit 210 performs the operations of programming, erasing, reading, and verifying for a selected cell of reference cell block 200. Sense amplifier 300 receives the detected cell current supplied from the memory and reference cell blocks, 100 and 200, and establishes the logic levels involved in the cell states by comparing the difference between them.
Each of the sense amplifiers, such as 300, is connected to one memory block and one reference cell block. The flash memory includes a plurality of the memory and reference cell blocks, and thereby plural sense amplifiers must be arranged therein to access the data from the memory blocks. The number of the sense amplifiers are, as usual, determined by the capacity of data output transmission in one cycle time of reading, and causes the number of the reference cell blocks and the second control circuits to be increased likewise. For instance, sixteen sense amplifiers in a flash memory device would need sixteen reference cell blocks and second control circuits therein. Such an increase in the number of reference cell portions causes an increase of cell size of the device.
Each reference block for each sense amplifier could deviate from a constant reference for sensing data of memory cells, because of differences between reference cells of the separated reference blocks.
It is important to maintain a constant reference value for detecting cell data. After programming or erasing, a memory cell is held in the state of off-cell or on-cell, and to determine whether a selected memory cell is an off-cell or an on-cell is accomplished by comparing a potential of the selected memory cell to a potential supplied from the reference cell of the reference cell block. Thus, if the reference values held in the reference cell blocks are different from one another, an erroneous function would occur during a reading operation.